| slovo | definícia |
rs-423
(foldoc) | EIA-423
RS-423
(Formerly "RS-423") An EIA
serial line standard which specifies single ended
communication. The mechanical connections for this interface
are specified by EIA-449. Although it was originally
intented as a successor of EIA-232 it is not widely used.
The EIA-232 standard has its limits at 20kbps and 1.5m.
EIA-423 can have a cable lenght of 1200m, and achieve a data
rate of 100Kbps. When no data is being transmitted, the
serial line is at a logical zero (+3 to +15 Volts). A logical
one is represented as a signal level of -15 to -3 Volts. In
practise, one often finds signals which switch between
nominally +4.5 and +0.5 Volts. Such signals are large by
modern standards, and because the impedance of the circuits is
relatively high, the allowable bit rate is modest. The data
is preceded by a start bit which is always a logical
one. There may be seven or eight bits of data, possibly
followed by an even or odd parity bit and one or two stop
bits. A "break" condition is a continuous logical one on the
line which is what would be observed if nothing was connected.
{Comparing EIA-422, 423, 449 to RS-232-C
(http://rad.com/networks/1995/rs232/rs449.htm)}. {Details
on RS-232, 422, 423 and 485
(http://rs485.com/rs485spec.html)}.
(2002-10-05)
|
| | podobné slovo | definícia |
rs-423
(foldoc) | EIA-423
RS-423
(Formerly "RS-423") An EIA
serial line standard which specifies single ended
communication. The mechanical connections for this interface
are specified by EIA-449. Although it was originally
intented as a successor of EIA-232 it is not widely used.
The EIA-232 standard has its limits at 20kbps and 1.5m.
EIA-423 can have a cable lenght of 1200m, and achieve a data
rate of 100Kbps. When no data is being transmitted, the
serial line is at a logical zero (+3 to +15 Volts). A logical
one is represented as a signal level of -15 to -3 Volts. In
practise, one often finds signals which switch between
nominally +4.5 and +0.5 Volts. Such signals are large by
modern standards, and because the impedance of the circuits is
relatively high, the allowable bit rate is modest. The data
is preceded by a start bit which is always a logical
one. There may be seven or eight bits of data, possibly
followed by an even or odd parity bit and one or two stop
bits. A "break" condition is a continuous logical one on the
line which is what would be observed if nothing was connected.
{Comparing EIA-422, 423, 449 to RS-232-C
(http://rad.com/networks/1995/rs232/rs449.htm)}. {Details
on RS-232, 422, 423 and 485
(http://rs485.com/rs485spec.html)}.
(2002-10-05)
|
|