| podobné slovo | definícia |
ddr = deutsche demokratische republik (1949-1990)
(encz) | DDR = Deutsche Demokratische Republik (1949-1990),NDR = Nemecká
demokratická republika n: [hist.] jose |
ivan petrovič pavlov (1849-1936)
(czen) | Ivan Petrovič Pavlov (1849-1936),Pavlovn: [jmén.] ruský fyziolog Petr
Prášek |
49th
(wn) | 49th
adj 1: the ordinal number of forty-nine in counting order [syn:
forty-ninth, 49th] |
atomic number 49
(wn) | atomic number 49
n 1: a rare soft silvery metallic element; occurs in small
quantities in sphalerite [syn: indium, In, {atomic
number 49}] |
eia-449
(foldoc) | EIA-449
RS-449
(Formerly "RS-449") An EIA
standard for a 37-pin or 9-pin D-type connector
(functional- and mechanical characteristics), usually used
with EIA-422 or EIA-423 electrical specifications.
(2002-10-05)
|
ieee standard 1149.1
(foldoc) | Joint Test Action Group
IEEE Standard 1149.1
JTAG
(JTAG, or "IEEE Standard 1149.1") A standard specifying
how to control and monitor the pins of compliant devices on a
printed circuit board.
Each device has four JTAG control lines. There is a
common reset (TRST) and clock (TCLK). The data line
daisy chains one device's test data out (TDO) pin
to the test data in (TDI) pin on the next device.
The protocol contains commands to read and set the values of
the pins (and, optionally internal registers) of devices.
This is called "boundary scanning". The protocol makes
board testing easier as signals that are not visible at the
board connector may be read and set.
The protocol also allows the testing of equipment, connected
to the JTAG port, to identify components on the board (by
reading the device identification register) and to control and
monitor the device's outputs.
JTAG is not used during normal operation of a board.
JTAG Technologies B.V. (http://jtag.com/).
{Boundary Scan/JTAG Technical Information - Xilinx, Inc.
(http://xilinx.com/support/techsup/journals/jtag/)}.
{Java API for Boundary Scan FAQs - Xilinx Inc.
(http://xilinx.com/products/software/sx/sxfaqs.htm)}.
{JTAG Boundary-Scan Test Products - Corelis, Inc.
(http://corelis.com/products/scanovrv.html)}.
{"Logic analyzers stamping out bugs at the cutting edge", EDN
Access, 1997-04-10
(http://ednmag.com/ednmag/reg/1997/041097/08df_02.htm)}.
{IEEE 1149.1 Device Architecture - Boundary-Scan Tutorial from
ASSET InterTech, Inc.
(http://asset-intertech.com/tutorial/arch.htm)}.
{"Application-Specific Integrated Circuits", Michael John
Sebatian Smith, published Addison-Wesley - Design Automation
Cafe
(http://dacafe.com/DACafe/EDATools/EDAbooks/ASIC/Book/CH14/CH14.2.htm)}.
{Software Debug options on ASIC cores - Embedded Systems
Programming Archive (http://embedded.com/97/feat9701.htm)}.
{Designing for On-Board Programming Using the IEEE 1149.1
(JTAG) Access Port - Intel
(http://developer.intel.com/design/flcomp/applnots/292186.htm)}.
{Built-In Self-Test Using Boundary Scan by Texas Instruments -
EDTN Network
(http://edtn.com/scribe/reference/appnotes/md003e9a.htm)}.
(1999-11-15)
|
iso 8649
(foldoc) | Association Control Service Element
ACSE
ISO 8649
ISO 8650
X.217
X.227
(ACSE) The OSI method for establishing a call
between two application programs. ACSE checks the
identities and contexts of the application entities, and could
apply an authentication security check.
Documents: ITU Rec. X.227 (ISO 8650), X.217 (ISO 8649)
(1997-12-07)
|
rfc 1449
(foldoc) | RFC 1449
The RFC defining transport mappings
for SNMP v2.
(rfc:1449).
(1997-11-23)
|
rfc 2049
(foldoc) | RFC 2049
One of the RFCs defining MIME.
(rfc:2049).
(1999-10-29)
|
rs-449
(foldoc) | EIA-449
RS-449
(Formerly "RS-449") An EIA
standard for a 37-pin or 9-pin D-type connector
(functional- and mechanical characteristics), usually used
with EIA-422 or EIA-423 electrical specifications.
(2002-10-05)
|