| slovo | definícia |
mips
(encz) | MIPS,MIPS [zkr.] [it.] Million Instructions Per Second = Milion
instrukcí za sekundu Ritchie |
mips
(czen) | MIPS,MIPS[zkr.] [it.] Million Instructions Per Second = Milion instrukcí
za sekundu Ritchie |
mips
(wn) | MIPS
n 1: (computer science) a unit for measuring the execution speed
of a computer's CPU (but not the whole system); "4 MIPS is
4,000,000 instructions per second" [syn: MIPS, {million
instructions per second}] |
mips
(foldoc) | MIPS
1. Million instructions per second.
The unit commonly used to give the rate at which a processor
executes instructions.
Often rendered by hackers as "Meaningless Indication of
Processor Speed" or in other unflattering ways. This
expresses a nearly universal attitude about the value of most
benchmark claims, said attitude being one of the great
cultural divides between hackers and marketroids.
The etymologically incorrect singular "1 MIP" is sometimes
heard.
See also KIPS and GIPS.
2. VAX MIPS.
3. {Microprocessor without Interlocked Pipeline
Stages}.
4. MIPS Technologies, Inc.
[Jargon File]
(1996-03-01)
|
mips
(jargon) | MIPS
/mips/, n.
[abbreviation]
1. A measure of computing speed; formally, ‘Million Instructions Per
Second’ (that's 10^6 per second, not 2^20!); often rendered by hackers as
‘Meaningless Indication of Processor Speed’ or in other unflattering ways,
such as ‘Meaningless Information Provided by Salesmen’. This joke expresses
an attitude nearly universal among hackers about the value of most {
benchmark} claims, said attitude being one of the great cultural divides
between hackers and marketroids (see also BogoMIPS). The singular is
sometimes ‘1 MIP’ even though this is clearly etymologically wrong. See
also KIPS and GIPS.
2. Computers, especially large computers, considered abstractly as sources
of computrons. “This is just a workstation; the heavy MIPS are hidden in
the basement.”
3. The corporate name of a particular RISC-chip company, later acquired by
SGI.
4. Acronym for ‘Meaningless Information per Second’ (a joke, prob.: from
sense 1).
|
mips
(vera) | MIPS
Microprocessor without Interlocked Piped Stages
|
mips
(vera) | MIPS
Million Instructions Per Second (CPU)
|
| | podobné slovo | definícia |
bogomips
(foldoc) | BogoMips
(From "bogus", "MIPS") The timing unit of the Linux
kernel.
A BogoMips is an unscientific measurement of processor speed
made by the Linux kernel when it boots, to calibrate an
internal busy-loop.
{BogoMips MiniHowto
(http://metalab.unc.edu/LDP/HOWTO/mini/BogoMips.html)}.
(1999-05-06)
|
lots of mips but no i/o
(foldoc) | lots of MIPS but no I/O
Used to describe a person who is technically brilliant but
can't seem to communicate with human beings effectively.
Technically it describes a machine that has lots of processing
power but is bottlenecked on input-output (in 1991, the IBM
Rios, a.k.a. RS/6000, is a notorious recent example).
[Jargon File]
|
mips project
(foldoc) | Microprocessor without Interlocked Pipeline Stages
MIPS project
(MIPS) A project at Stanford University intended
to simplify processor design by eliminating hardware
interlocks between the five pipeline stages. This means
that only single execution cycle instructions can access the
thirty two 32-bit general registers, so that the compiler
can schedule them to avoid conflicts. This also means that
LOAD/STORE and branch instructions have a one-cycle delay to
account for. However, because of the importance of multiply
and divide instructions, a special HI/LO pair of
multiply/divide registers exist which do have hardware
interlocks, since these take several cycles to execute and
complicate instruction scheduling.
The project eventually lead to the commercial MIPS R2000
processor.
(1995-02-09)
|
mips r2000
(foldoc) | MIPS R2000
R2000
The R2000 design came, in about 1987, from the
Stanford MIPS project, which stood for Microprocessor
without Interlocked Pipeline Stages.
Like the AMD 29000, the R2000 has no {condition code
register} considering it a potential bottleneck. The
program counter can be read like other registers.
The CPU includes an MMU that can also control a cache, and
the CPU can operate as big-endian or little-endian. There
is a FPU, the R2010.
Versions include the MIPS R3000 and MIPS R4000.
(1995-02-09)
|
mips r2010
(foldoc) | MIPS R2010
A FPU for the MIPS R2000.
(1995-02-09)
|
mips r3000
(foldoc) | MIPS R3000
A version of the MIPS R2000 with improved cache control.
(1995-02-09)
|
mips r4000
(foldoc) | MIPS R4000
A 64-bit version of the MIPS R3000 with has more pipeline
stages for a higher clock rate and performance.
(1995-02-09)
|
mips technologies, inc.
(foldoc) | MIPS Technologies, Inc.
A company which designs, develops, and licenses
reduced instruction set computer (RISC) microprocessors
and compilers. MIPS Technologies, Inc. is a wholly-owned
subsidiary of Silicon Graphics, Inc. and operates as an
independent unit. MIPS is the successor to the processor
business of MIPS Computer Systems which was founded in 1984
and merged with Silicon Graphics on 29 June 1992.
MIPS Technologies developed the world's first RISC VLSI
microprocessors (1985) (or was it the ARM?), the first
commercial 64-bit microprocessor (MIPS R4000, 1992),
announced MIPS R4300i - the first 64-bit RISC processor
designed for interactive consumer applications (April 1995).
They announced the MIPS R10000 - the next generation
general-purpose MIPS microprocessor and the most powerful
processor in the world (October 1994).
MIPS' semiconductor company partners participate in the design
and development of MIPS processors and software and then
produce, market, and support the processors. MIPS itself does
not fabricate or sell products. MIPS' semiconductor partners
are: Integrated Device Technology, LSI Logic Corporation,
NEC Corporation, NKK Corporation, {Philips
Semiconductors}, Siemens AG, and Toshiba Corporation.
MIPS' products include:
R4000 - 100 MHz; 1.35M transistors, primary i/d cache 8KB/8KB,
SPECint92 58.3/ SPECfp92 61.4.
R4300i - 133 MHZ, 1.35M transistors; primary i/d cache,
16KB/8KB, SPECint92 80, SPECfp92 60.
R4400 - 250 MHz, 2.3M transistors, primary i/d cache
16KB/16KB, SPECint92 175.8, SPECfp92 164.4.
R4600 - 133 MHz, 1.9M transistors, primary i/d cache
16KB/16KB, SPECint92 85, SPECfp92 75.
R8000/R8010 - 90 MHz, 2.6M, .83M transistors, primary i/d
cache, 16KB/16KB, SPECint92 132, SPECfp92 396.
R10000 - 200 MHz, 6.7M transistors, primary i/d cache
32KB/32KB, SPECint92 >300, SPECfp92 >600.
MIPS' processor chips were used in the DEC 3100 series of
workstations.
(http://mips.com/).
Usenet newsgroup: news:comp.sys.mips.
(1996-03-01)
|
vax mips
(foldoc) | VAX MIPS
VUP
(Or VAX Unit of Performance, VUP) The processing
power normally attributed to a Digital Equipment Corporation
VAX 11/780. Future VAX systems were rated according to this
scale (e.g. VAX 8350's being 2.7 VUPs per CPU). A MicroVAX
II is normally associated with 0.9 VUPs and at a later time
the MicroVUP was coined to rate VAX workstations. The use
of the VUP by Digital Equipment Corporation has been replaced
with more standard benchmarks (SPECint and SPECfp) in the
DEC Alpha processor systems.
(1996-08-22)
|
water mips
(foldoc) | water MIPS
Large, water-cooled computers of either today's
ECL-supercomputer flavour or yesterday's traditional
mainframe type.
See MIPS
[Jargon File]
(1995-03-25)
|
bogomips
(jargon) | BogoMIPS
/bo'go·mips/, n.
The number of million times a second a processor can do absolutely nothing.
The Linux OS measures BogoMIPS at startup in order to calibrate some soft
timing loops that will be used later on; details at the BogoMIPS mini-HOWTO
. The name Linus chose, of course, is an ironic comment on the uselessness
of all other MIPS figures.
|
lots of mips but no i/o
(jargon) | lots of MIPS but no I/O
adj.
Used to describe a person who is technically brilliant but can't seem to
communicate with human beings effectively. Technically it describes a
machine that has lots of processing power but is bottlenecked on
input-output (in 1991, the IBM Rios, a.k.a. RS/6000, was a notorious
example).
|
water mips
(jargon) | water MIPS
n.
(see MIPS, sense 2) Large, water-cooled machines of either today's
ECL-supercomputer flavor or yesterday's traditional mainframe type.
[74-08-18]
A really unusual kind of water MIPS.
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