| podobné slovo | definícia |
erasable programmable read-only memory
(encz) | erasable programmable read-only memory,mazatelné programovatelná paměť
pouze pro čtení n: EPROM Petr Menšík |
microprogrammable
(encz) | microprogrammable,mikroprogramovatelný adj: Zdeněk Brož |
nonprogrammable
(encz) | nonprogrammable,neprogramovatelný |
reprogrammable
(encz) | reprogrammable,přeprogramovatelný adj: Zdeněk Brožreprogrammable,reprogramovatelný adj: Zdeněk Brož |
field programmable gated array
(czen) | Field Programmable Gated Array,FPGA[zkr.] [voj.] Zdeněk Brož a
automatický překlad |
programmable ordnance technology
(czen) | Programmable Ordnance Technology,PROTEC[zkr.] [voj.] Zdeněk Brož a
automatický překlad |
programmable powdered preform process for aerospace
(czen) | Programmable Powdered Preform Process for Aerospace,P4A[zkr.]
[voj.] Zdeněk Brož a automatický překlad |
erasable programmable read-only memory
(wn) | erasable programmable read-only memory
n 1: (computer science) a read-only memory chip that can be
erased by ultraviolet light and programmed again with new
data [syn: erasable programmable read-only memory,
EPROM] |
advanced programmable interrupt controller
(foldoc) | Advanced Programmable Interrupt Controller
APIC
(APIC) A {Programmable Interrupt
Controller} (PIC) that can handle interrupts from and for
multiple CPUs, and, usually, has more available interrupt
lines that a typical PIC.
(2003-03-18)
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complex programmable logic device
(foldoc) | complex programmable logic device
CPLD
(CPLD) A programmable circuit similar to an FPGA,
but generally on a smaller scale, invented by Xilinx, Inc.
(1998-09-26)
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electrically alterable programmable read-only memory
(foldoc) | Electrically Alterable Programmable Read-Only Memory
EAPROM
(EAPROM) A PROM whose contents can be changed.
[What's the difference between EAPROM and EEPROM?]
(1995-11-12)
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electrically erasable programmable read-only memory
(foldoc) | Electrically Erasable Programmable Read-Only Memory
(EEPROM) A non-volatile storage device using a
technique similar to the floating gates in EPROMs but with
the capability to discharge the floating gate electrically.
Usually bytes or words can be erased and reprogrammed
individually during system operation.
In contrast to RAM, writing takes much longer than reading
and EEPROM is more expensive and less dense than RAM. It is
appropriate for storing small amounts of data which is changed
infrequently, e.g. the hardware configuration of an Acorn
Archimedes.
[Difference from EAPROM?]
(1995-04-22)
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erasable programmable read-only memory
(foldoc) | Erasable Programmable Read-Only Memory
EPROM
(EPROM) A type of storage device in which the data
is determined by electrical charge stored in an isolated
("floating") MOS transistor gate. The isolation is good
enough to retain the charge almost indefinitely (more than ten
years) without an external power supply. The EPROM is
programmed by "injecting" charge into the floating gate, using
a technique based on the tunnel effect. This requires higher
voltage than in normal operation (usually 12V - 25V). The
floating gate can be discharged by applying ultraviolet light
to the chip's surface through a quartz window in the package,
erasing the memory contents and allowing the chip to be
reprogrammed.
(1995-04-22)
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field-programmable gate array
(foldoc) | field-programmable gate array
(FPGA) A gate array where the logic network can
be programmed into the device after its manufacture. An FPGA
consists of an array of logic elements, either gates or lookup
table RAMs, flip-flops and programmable interconnect
wiring.
Most FPGAs are reprogrammable, since their logic functions and
interconnect are defined by RAM cells. The Xilinx LCA,
Altera FLEX and AT&T ORCA devices are examples. Others
can only be programmed once, by closing "antifuses". These
retain their programming permanently. The Actel FPGAs are
the leading example of such devices. Atmel FPGAs are
currently (July 1997) the only ones in which part of the array
can be reprogrammed while other parts are active.
As of 1994, FPGAs have logic capacity up to 10K to 20K
2-input-NAND-equivalent gates, up to about 200 I/O pins and
can run at clock rates of 50 MHz or more. FPGA designs must
be prepared using CAD software tools, usually provided by
the chip vendor, to do technology mapping, partitioning and
placement, routing, and binary output. The resulting binary
can be programmed into a ROM connected to the FPGA or
downloaded to the FPGA from a connected computer.
In addition to ordinary logic applications, FPGAs have enabled
the development of logic emulators. There is also research
on using FPGAs as computing devices, taking direct advantage
of their reconfigurability into problem-specific hardware
processors.
Usenet newsgroup: news:comp.arch.fpga.
(1997-07-11)
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flash erasable programmable read-only memory
(foldoc) | Flash Erasable Programmable Read-Only Memory
FEPROM
Flash EPROM
Flash ROM
(FEPROM, "flash memory") A kind of {non-volatile
storage} device similar to EEPROM, but where erasing can
only be done in blocks or the entire chip.
In 1995 this relatively new technology started to replace
EPROMs because reprogramming could be done with the chip
installed. At that time FEPROMs could be rewritten about 1000
times.
Like EAPROM and ferro-magnetic material, FEPROMs rely on {FN
tunnelling}. Some flash memory supports block erase.
(1995-04-22)
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international programmable airline reservation system
(foldoc) | International Programmable Airline Reservation System
IPARS
(IPARS) The international version of PARS,
designated by IBM for use in all IBM World trade countries
(i.e. outside domestic USA).
(1999-01-18)
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one time programmable read-only memory
(foldoc) | One Time Programmable Read-Only Memory
OTPROM
(OTPROM, EPROM OTP) A kind of storage device like an
EPROM but with no quartz glass window in the package for
erasing the contents. This reduces the packaging cost but
means the device cannot be erased with UV and so can only be
written once. Erasure is possible, but expensive, with
X-rays.
(1995-04-22)
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programmable airline reservation system
(foldoc) | Programmable Airline Reservation System
PARS
(PARS) An IBM proprietary large scale airline
reservation application, executing under the control of IBM's
ACP (and later its successor, TPF).
In the early days of automated reservations systems in the
1960s and 1970s the combination of ACP and PARS provided
unprecendented scale and performance from an on-line
real-time system, and for a considerable period ranked among
the largest networks and systems of the era.
IPARS was the international version.
(1999-01-18)
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programmable array logic
(foldoc) | Programmable Array Logic
(PAL) A family of fuse-programmable logic
integrated circuits originally developed by MMI.
Registered or combinatorial output functions are modelled in
a sum of products form. Each output is a sum (logical or)
of a fixed number of products (logical and) of the input
signals. This structure is well suited for automatic
generation of programming patterns by logic compilers.
PAL devices are programmed by blowing the fuses permanently
using overvoltage.
Today, more complex devices based on the same original
architecture are available (CPLD's for Complex PLD's) that
incorporate the equivalent of several original PAL chips. PAL
chips are, however, still popular due to their high speed.
Generic Array Logic devices are reprogrammable and contain
more logic gates.
(1995-12-09)
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programmable interrupt controller
(foldoc) | Programmable Interrupt Controller
PIC A special-purpose {integrated
circuit} that functions as an overall manager in an
interrupt driven system. It accepts requests from the
peripheral equipment, determines which of the incoming
requests is of the highest priority, ascertains whether the
incoming request has a higher priority value than the level
currently being serviced, and issues an interrupt to the CPU
based on this determination.
PICs typically have eight interrupt lines, and two PICs are
often cascaded to provide 15 available interrupt lines.
See also: Advanced Programmable Interrupt Controller.
(2003-03-18)
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programmable logic controller
(foldoc) | Programmable Logic Controller
PLC
(PLC) A device used to automate monitoring and
control of industrial plant. Can be used stand-alone or in
conjunction with a SCADA or other system.
(1997-02-11)
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programmable read-only memory
(foldoc) | Programmable Read-Only Memory
PROM
(PROM) A kind of ROM which can be written using a
PROM programmer. The contents of each bit is determined by a
fuse or antifuse. The memory can be programmed once after
manufacturing by "blowing" the fuses, which is an irreversible
process. Blowing a fuse opens a connection while blowing an
antifuse closes a connection (hence the name). Programming is
done by applying high-voltage pulses which are not encountered
during normal operation.
(1995-04-22)
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standard commands for programmable instruments
(foldoc) | Standard Commands for Programmable Instruments
SCPI
(SCPI) A standard complementing IEEE 488,
developed by Hewlett-Packard and promoted by the {SCPI
Consortium}.
(1994-11-01)
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