| podobné slovo | definícia |
instruction
(mass) | instruction
- nariadenie, príkaz, vyučovanie |
catechetical instruction
(encz) | catechetical instruction, n: |
complex instruction set computer
(encz) | complex instruction set computer, n: |
complex instruction set computing
(encz) | complex instruction set computing, n: |
computer aided instruction
(encz) | Computer Aided Instruction,počítačem podporovaná výuka [it.] Jiří
Šmoldas |
course of instruction
(encz) | course of instruction, n: |
instruction
(encz) | instruction,instrukce n: Pavel Machek; Gizainstruction,návod n: RNDr. Pavel Piskačinstruction,pokyn n: webinstruction,předpis n: RNDr. Pavel Piskač |
instruction book
(encz) | instruction book, n: |
instruction execution
(encz) | instruction execution, n: |
instruction manual
(encz) | instruction manual, n: |
instructional
(encz) | instructional,instruktážní Pavel Machek; Giza |
instructions
(encz) | instructions,instrukce pl. Zdeněk Brož |
machine instruction
(encz) | machine instruction,strojová instrukce Zdeněk Brož |
macro instruction
(encz) | macro instruction, n: |
microinstruction
(encz) | microinstruction,mikroinstrukce n: Zdeněk Brož |
microinstructions
(encz) | microinstructions,mikroinstrukce pl. Zdeněk Brož |
million instructions per second
(encz) | million instructions per second, n: |
nanoinstruction
(encz) | nanoinstruction,nanoinstrukce |
nanoinstructions
(encz) | nanoinstructions,nanoinstrukce |
operating instructions
(encz) | operating instructions,návod k použití n: Věroš Kaplan |
programmed instruction
(encz) | programmed instruction, |
reduced instruction set computer
(encz) | reduced instruction set computer, n: |
reduced instruction set computing
(encz) | reduced instruction set computing, n: |
supervisor call instruction
(encz) | supervisor call instruction, n: |
waters protection instruction
(encz) | waters protection instruction,směrnice pro ochranu vod [eko.] RNDr.
Pavel Piskač |
billion instruction per second
(czen) | Billion Instruction Per Second,BIPS[zkr.] [voj.] Zdeněk Brož a
automatický překlad |
read the f---ing instructions
(czen) | Read The F---ing Instructions,RTFI[zkr.] |
Clinical instruction
(gcide) | Clinical \Clin"ic*al\ (kl[i^]n"[i^]k*al), Clinic \Clin"ic\
(kl[i^]n"[i^]k), a. [Gr. kliniko`s, fr. kli`nh bed, fr.
kli`nein to lean, recline: cf. F. clinique. See Lean, v.
i.]
1. Of or pertaining to a bed, especially, a sick bed.
[1913 Webster]
2. Of or pertaining to a clinic, or to the study of disease
in the living subject.
[1913 Webster]
Clinical baptism, baptism administered to a person on a
sick bed.
Clinical instruction, instruction by means of clinics.
Clinical lecture (Med.), a discourse upon medical topics
illustrated by the exhibition and examination of living
patients.
Clinical medicine, Clinical surgery, that part of
medicine or surgery which is occupied with the
investigation of disease in the living subject.
[1913 Webster] |
Instructional
(gcide) | Instructional \In*struc"tion*al\, a.
Pertaining to, or promoting, instruction; educational.
[1913 Webster] |
Misinstruction
(gcide) | Misinstruction \Mis`in*struc"tion\, n.
Wrong or improper instruction.
[1913 Webster] |
book of instructions
(wn) | book of instructions
n 1: a manual usually accompanying a technical device and
explaining how to install or operate it [syn: {instruction
manual}, instructions, book of instructions, {operating
instructions}] |
catechetical instruction
(wn) | catechetical instruction
n 1: teaching religious principles by questions and answers |
complex instruction set computer
(wn) | complex instruction set computer
n 1: (computer science) a kind of computer architecture that has
a large number of instructions hard coded into the CPU chip
[syn: complex instruction set computing, {complex
instruction set computer}, CISC] [ant: RISC, {reduced
instruction set computer}, {reduced instruction set
computing}] |
complex instruction set computing
(wn) | complex instruction set computing
n 1: (computer science) a kind of computer architecture that has
a large number of instructions hard coded into the CPU chip
[syn: complex instruction set computing, {complex
instruction set computer}, CISC] [ant: RISC, {reduced
instruction set computer}, {reduced instruction set
computing}] |
course of instruction
(wn) | course of instruction
n 1: education imparted in a series of lessons or meetings; "he
took a course in basket weaving"; "flirting is not unknown
in college classes" [syn: course, course of study,
course of instruction, class] |
instruction
(wn) | instruction
n 1: a message describing how something is to be done; "he gave
directions faster than she could follow them" [syn:
direction, instruction]
2: the activities of educating or instructing; activities that
impart knowledge or skill; "he received no formal education";
"our instruction was carefully programmed"; "good classroom
teaching is seldom rewarded" [syn: education,
instruction, teaching, pedagogy, didactics,
educational activity]
3: the profession of a teacher; "he prepared for teaching while
still in college"; "pedagogy is recognized as an important
profession" [syn: teaching, instruction, pedagogy]
4: (computer science) a line of code written as part of a
computer program [syn: instruction, command, statement,
program line] |
instruction book
(wn) | instruction book
n 1: a book of directions for using or operating some piece of
equipment |
instruction execution
(wn) | instruction execution
n 1: (computer science) the process of carrying out an
instruction by a computer [syn: execution, {instruction
execution}] |
instruction manual
(wn) | instruction manual
n 1: a manual usually accompanying a technical device and
explaining how to install or operate it [syn: {instruction
manual}, instructions, book of instructions, {operating
instructions}] |
instructional
(wn) | instructional
adj 1: of or relating to or used in instruction; "instructional
aids" |
instructions
(wn) | instructions
n 1: a manual usually accompanying a technical device and
explaining how to install or operate it [syn: {instruction
manual}, instructions, book of instructions, {operating
instructions}] |
macro instruction
(wn) | macro instruction
n 1: a single computer instruction that results in a series of
instructions in machine language [syn: macro, {macro
instruction}] |
million instructions per second
(wn) | million instructions per second
n 1: (computer science) a unit for measuring the execution speed
of a computer's CPU (but not the whole system); "4 MIPS is
4,000,000 instructions per second" [syn: MIPS, {million
instructions per second}] |
operating instructions
(wn) | operating instructions
n 1: a manual usually accompanying a technical device and
explaining how to install or operate it [syn: {instruction
manual}, instructions, book of instructions, {operating
instructions}] |
reduced instruction set computer
(wn) | reduced instruction set computer
n 1: (computer science) a kind of computer architecture that has
a relatively small set of computer instructions that it can
perform [syn: reduced instruction set computing, {reduced
instruction set computer}, RISC] [ant: CISC, {complex
instruction set computer}, {complex instruction set
computing}] |
reduced instruction set computing
(wn) | reduced instruction set computing
n 1: (computer science) a kind of computer architecture that has
a relatively small set of computer instructions that it can
perform [syn: reduced instruction set computing, {reduced
instruction set computer}, RISC] [ant: CISC, {complex
instruction set computer}, {complex instruction set
computing}] |
supervisor call instruction
(wn) | supervisor call instruction
n 1: an instruction that interrupts the program being executed
and passes control to the supervisor [syn: system call,
supervisor call instruction] |
complex instruction set computer
(foldoc) | Complex Instruction Set Computer
CISC
(CISC) A processor where each instruction can perform several
low-level operations such as memory access, arithmetic
operations or address calculations. The term was coined in
contrast to Reduced Instruction Set Computer.
Before the first RISC processors were designed, many computer
architects were trying to bridge the "semantic gap" - to
design instruction sets to support high-level languages by
providing "high-level" instructions such as procedure call and
return, loop instructions such as "decrement and branch if
non-zero" and complex addressing modes to allow data
structure and array accesses to be compiled into single
instructions.
While these architectures achieved their aim of allowing
high-level language constructs to be expressed in fewer
instructions, it was observed that they did not always result
in improved performance. For example, on one processor it was
discovered that it was possible to improve the performance by
NOT using the procedure call instruction but using a sequence
of simpler instructions instead. Furthermore, the more
complex the instruction set, the greater the overhead of
decoding an instruction, both in execution time and silicon
area. This is particularly true for processors which used
microcode to decode the (macro) instruction. It is easier
to debug a complex instruction set implemented in microcode
than one whose decoding is "hard-wired" in silicon.
Examples of CISC processors are the Motorola 680x0 family
and the Intel 80186 through Intel 486 and Pentium.
(1994-10-10)
|
computer-aided instruction
(foldoc) | Computer-Aided Instruction
CAI
CBT
Computer-Aided Learning
Computer-Assisted Learning
Computer-Based Training
e-learning
(CAI, or "- assisted", "- learning",
CAL, Computer-Based Training CBT, "e-learning") The use of
computers for education and training.
The programs and data used in CAI, known as "courseware", may
be supplied on media such as CD-ROM or delivered via a
network which also enables centralised logging of student
progress. CAI may constitute the whole or part of a course,
may be done individually or in groups ("Computer Supported
Collaborative Learning", CSCL), with or without human
guidance.
(2011-11-25)
|
delay instruction
(foldoc) | delayed control-transfer
annulled branch
branch delay slot
delay instruction
delay slot
A technique used on the SPARC processor to reduce
the effect of pipeline breaks by executing the instruction after
a branch instruction (the "delay instruction" in the "delay
slot"). If there is no useful instruction which can be placed in
the delay slot then the "annul bit" on the control transfer
instruction can be set, preventing execution of the delay
instruction (unless the control transfer is conditional and is
taken).
Annulled branches are indicated in SPARC assembler language by
appending ",A" to the operation code. For example,
LOOP: ...
CMP %L0,10
BLE,A LOOP
ADD %L2, %L3, #L4
If the delay instruction is also a control transfer instruction
then it gets more complicated. Both control transfer instructions
are executed (but not the following instruction) and, assuming
they are both taken, control is transferred briefly to the
destination of the first and then immediately to the destination
of the second.
(2001-06-26)
|
delivered source instruction
(foldoc) | Delivered Source Instruction
DSI
(DSI) One line of source code (LOC)
developed by a project.
DSI is the primary input to many tools for estimating software
cost. The term "delivered" is generally meant to exclude
non-delivered support software such as test drivers. However,
if these are developed with the same care as delivered
software, with their own reviews, test plans, documentation,
etc., then they should be counted. The "source instructions"
include all program instructions created by project personnel
and processed into machine code by some combination of
preprocessors, compilers, and assemblers. It excludes
comments and unmodified utility software. It includes {job
control language}, format statements, and data declarations.
(1996-05-29)
|
idealized instruction set
(foldoc) | Idealized Instruction Set
(IIS) The assembly language for the Flagship
parallel machine.
["An Idealized Instruction Set for a Packet Rewrite Machine",
J. Sargeant, Manchester U, 1988].
(1994-11-07)
|
instruction
(foldoc) | machine instruction
instruction
The smallest element of a machine code program.
(2009-06-23)
|
instruction address register
(foldoc) | Instruction Address Register
(IAR) The IBM name for program counter.
The IAR can be accessed by way of a supervisor call in
supervisor state, but cannot be directly addressed in
problem state.
(1995-03-21)
|
instruction mnemonic
(foldoc) | instruction mnemonic
A word or acronym used in assembly language to
represent a binary machine instruction operation code.
Different processors have different instruction sets and
therefore use a different set of mnemonics to represent
them.
E.g. ADD, B (branch), BLT (branch if less than), SVC, MOVE,
LDR (load register).
(1997-02-18)
|
instruction prefetch
(foldoc) | instruction prefetch
prefetch
A technique which attempts to minimise the time
a processor spends waiting for machine instructions to be
fetched from memory. Instructions following the one currently
being executed are loaded into a prefetch queue when the
processor's external bus is otherwise idle. If the
processor executes a branch instruction or receives an
interrupt then the queue must be flushed and reloaded from
the new address.
Instruction prefetch is often combined with pipelining in
an attempt to keep the pipeline busy.
By 1995 most processors used prefetching, e.g. {Motorola
680x0}, Intel 80x86.
[First processors using prefetch?]
(1998-03-29)
|
instruction register
(foldoc) | instruction register
(IR) The part of a central processing unit
(CPU) control unit that holds the machine instruction
currently being executed. The CPU's fetch-execute cycle
loads instructions from memory into the instruction
register. The IR in turn drives the instruction decoding
logic that determines what operation teh CPU should perform on
what data.
Modern processors have an instruction pipeline to minimise
the time the control unit is waiting for instructions and data
to be fetched from memory. This may distrubute the job of the
IR over several registers in the pipeline.
(2018-08-31)
|
instruction scheduling
(foldoc) | instruction scheduling
The compiler phase that orders instructions
on a pipelined, superscalar, or VLIW architecture so as
to maximise the number of function units operating in parallel
and to minimise the time they spend waiting for each other.
Examples are filling a delay slot; interspersing
floating-point instructions with integer instructions to
keep both units operating; making adjacent instructions
independent, e.g. one which writes a register and another which
reads from it; separating memory writes to avoid filling the
write buffer.
Norman P. Jouppi and David W. Wall, {"Available
Instruction-Level Parallelism for Superscalar and
Superpipelined Processors"
(ftp://gatekeeper.dec.com/archive/pub/DEC/WRL/research-reports/WRL-TR-89.7.ps.Z)},
Proceedings of the Third International Conference on
Architectural Support for Programming Languages and Operating
Systems, pp. 272--282, 1989.
[The SPARC Architecture Manual, v8, ISBN 0-13-825001-4]
|
instruction set
(foldoc) | instruction set
The collection of machine language
instructions that a particular processor understands.
The term is almost synonymous with "{instruction set
architecture}" since the instructions are fairly meaningless
in isolation from the registers etc. that they manipulate.
(1999-07-05)
|
instruction set architecture
(foldoc) | instruction set architecture
(ISA) The parts of a processor's design that
need to be understood in order to write assembly language,
such as the machine language instructions and registers.
Parts of the architecture that are left to the implementation,
such as number of superscalar functional units, cache
size and cycle speed, are not part of the ISA.
The definition of SPARC, for example, carefully
distinguishes between an implementation and a specification.
(1999-01-16)
|
instruction set processor
(foldoc) | Instruction Set Processor
(ISP) A family of languages for describing the
instruction sets of computers.
["Computer Structures: Readings and Examples", D.P. Siewiorek
et al, McGraw-Hill 1982].
(1995-10-12)
|
instructional technology
(foldoc) | instructional technology
Design, development, use, management and
evaluation of process and resources for learning.
Instructional technology aims to promote the application of
validated, practical procedures in the design and delivery of
instruction. It is often defined either in terms of media and
other technology used (e.g. audiovisual media and equipment
and computers), or in terms of a systematic process which
encompasses instructional design, development, delivery and
evaluation.
["Instructional Technology: The Definition and Domains of the
Field", 1994, Barbara Seels and Rita Richey, Washington, D.C.,
Association for Educational Communications and Technology].
(2010-01-29)
|
katmai new instructions
(foldoc) | Streaming SIMD Extensions
Katmai New Instructions
KNI
SSE
(SSE) Intel Corporation's floating point
SIMD extention of their Pentium microprocessor
architecture. SSE was formerly know as KNI (Katmai New
Instructions). It was introduced with the Pentium III.
{Intel Pentium III
(http://developer.intel.com/design/pentiumiii/prodbref/)}.
ipoem (http://ipoem.com/technology/Docs/pentium4.html).
(2003-07-13)
|
machine instruction
(foldoc) | machine instruction
instruction
The smallest element of a machine code program.
(2009-06-23)
|
multiple instruction multiple data
(foldoc) | Multiple Instruction/Multiple Data
MIMD
Multiple Instruction Multiple Data
(MIMD) The classification under Flynn's taxonomy of a
parallel processor where many functional units perform
different operations on different data. Examples would be a
network of workstations or transputers. Compare SIMD.
(1994-11-08)
|
multiple instruction/multiple data
(foldoc) | Multiple Instruction/Multiple Data
MIMD
Multiple Instruction Multiple Data
(MIMD) The classification under Flynn's taxonomy of a
parallel processor where many functional units perform
different operations on different data. Examples would be a
network of workstations or transputers. Compare SIMD.
(1994-11-08)
|
orthogonal instruction set
(foldoc) | orthogonal instruction set
An instruction set where all (or most)
instructions have the same format and all registers and
addressing modes can be used interchangeably - the choices
of op code, register, and addressing mode are mutually
independent (loosely speaking, the choices are
"orthogonal"). This contrasts with some early Intel
microprocessors where only certain registers could be used
by certain instructions.
Examples include the PDP-11, 680x0, ARM, VAX.
(2002-06-26)
|
privileged instruction
(foldoc) | privileged instruction
A machine code instruction that may only be executed when
the processor is running in supervisor mode. Privileged
instructions include operations such as I/O and {memory
management}.
(1995-02-15)
|
reduced instruction set computer
(foldoc) | Reduced Instruction Set Computer
RISC
(RISC) A processor whose design is based on the
rapid execution of a sequence of simple instructions rather
than on the provision of a large variety of complex
instructions (as in a Complex Instruction Set Computer).
Features which are generally found in RISC designs are uniform
instruction encoding (e.g. the op-code is always in the same
bit positions in each instruction which is always one word
long), which allows faster decoding; a homogenous {register
set}, allowing any register to be used in any context and
simplifying compiler design; and simple addressing modes
with more complex modes replaced by sequences of simple
arithmetic instructions.
Examples of (more or less) RISC processors are the {Berkeley
RISC}, HP-PA, Clipper, i960, AMD 29000, MIPS R2000
and DEC Alpha. IBM's first RISC computer was the RT/PC
(IBM 801), they now produce the RISC-based {RISC
System/6000} and SP/2 lines.
Despite Apple Computer's bogus claims for their
PowerPC-based Macintoshes, the first RISC processor used
in a personal computer was the Advanced RISC Machine (ARM)
used in the Acorn Archimedes.
(1997-06-03)
|
single instruction multiple data
(foldoc) | Single Instruction/Multiple Data
SIMD
Single Instruction Multiple Data
(SIMD) (Or "data parallel") The classification under {Flynn's
taxonomy} for a parallel processor where many processing
elements (functional units) perform the same operations on
different data. There is often a central controller which
broadcasts the instruction stream to all the processing
elements.
Contrast Multiple Instruction/Multiple Data.
(1994-11-04)
|
single instruction/multiple data
(foldoc) | Single Instruction/Multiple Data
SIMD
Single Instruction Multiple Data
(SIMD) (Or "data parallel") The classification under {Flynn's
taxonomy} for a parallel processor where many processing
elements (functional units) perform the same operations on
different data. There is often a central controller which
broadcasts the instruction stream to all the processing
elements.
Contrast Multiple Instruction/Multiple Data.
(1994-11-04)
|
very long instruction word
(foldoc) | Very Long Instruction Word
VLIW
(VLIW) Used to describe a {machine
code} instruction set implemented using {horizontal
microcode}. A horizontally encoded instruction word which
encodes four or more operations might be considered "very
long".
VLIW architectures are sometimes classified as a type of
static superscalar architecture. They are static in the
sense that which units operate in parallel is determined by
the instruction rather than by dynamic scheduling at {run
time}.
Producing code for VLIW machines is difficult; {trace
scheduling} is a helpful compiler technique.
The most famous VLIW machine was built by (the late)
Multiflow Computer, Inc.
(1994-11-11)
|
INSTRUCTION
(bouvier) | INSTRUCTION, French law. This word signifies the means used and formality
employed to prepare a case for trial. it is generally applied to criminal
cases, and is then called criminal, instruction; it is then defined the acts
and proceedings which tend to prove positively a crime or delict, in order
to inflict on the guilty person the punishment which he deserves.
|
INSTRUCTIONS
(bouvier) | INSTRUCTIONS, com. law, Contracts. Orders given by a principal to his agent
in relation to the business of his agency.
2. The agent is bound to obey the instructions he has received and when
he neglects so to do, he is responsible for the consequences, unless he is
justified by matter of necessity. 4 Binn. R. 361; 1 Liverm. Agency, 368.
3. Instructions differ materially from authority, as regards third
persons. When a written authority is known to exist, or, by the nature of
the transaction, it is presupposed, it is the duty of persons dealing with
an agent to ascertain the nature and extent of his authority; but they are
not required to make inquiry of the agent as to any private instructions
from his principal, for the obvious reason that they may be presumed to be
secret and of a confidential nature, and therefore not to be communicated to
third persons. 5 Bing. R. 442.
4. Instructions are given as applicable to the usual course of things,
and are subject to two qualifications which are naturally, and perhaps
necessarily implied in every mercantile agency. 1. As instructions are
applicable only to the ordinary course of affairs, the agent will be
justified, in cases of extreme necessity and unforeseen emergency, in
deviating from them; as, for example, when goods on hand are perishable and
perishing, or when they are accidentally injured and must be sold to prevent
further loss; or if they are in imminent danger of being lost by the capture
of the port where they are, they may be transferred to another port. Story
on Ag. Sec. 85, 118, 193; 3 Chit. Com. Law, 218; 4 Binn. 361; 1 Liverm. on
Ag. 368. 2. Instructions must be lawful; if they are given to perform an
unlawful act, the agent is not bound by them. 4 Campb. 183; Story on Ag.
Sec. 195. But the lawfulness of such instruction does not relate to the laws
of foreign countries. Story, Confl. of Laws, Sec. 245; 1 Liverm. on Ag. 15-
19. As to the construction of letters of instruction, see 3 Wash. C. C. R.
151; 4 Wash. C. C. R. 551; 1 Liv. on Ag. 403; Story on Ag. Sec. 74; 2 Wash.
C. C. R. 132; 2 Crompt. & J. 244; 1 Knapp,, R. 381.
INSTRUCTIONS, practice. The statements of a cause of action, given by a
client to his attorney, and which, where such is the practice, are sent to
his pleader to put into legal form of a declaration. Warr. Stud. 284.
2. Instructions to counsel are their indemnity for any aspersions they
may make on the opposite party; but attorneys who have a just regard to
their own reputation will be cautious, even under instructions, not to make
any unnecessary attack upon a party or witness. For such unjustifiable
conduct the counsel will be held responsible. Eunom. Dial. 2, Sec. 43, p.
132. For a form of instructions, see 3 Chit. Pr. 117, and 120 n.
|
SAILING INSTRUCTIONS
(bouvier) | SAILING INSTRUCTIONS, mar. law. Written or printed directions, delivered by
the commanding officer of a convoy to the several masters of the ships under
his care, by which they are enabled to understand and answer his signals, to
know the place of rendezvous appointed for the fleet, in case of dispersion
by storm, by an enemy, or by any other accident.
2. Without sailing instructions no vessel can have the full protection
and benefit of convoy. Marsh. Ins. 368.
|