| | podobné slovo | definícia |
fuel system icing inhibitor (mil-i-27686)
(czen) | Fuel System Icing Inhibitor (MIL-I-27686),FSII[zkr.] [voj.] Zdeněk Brož
a automatický překlad |
robert falcon scott (1868-1912)
(czen) | Robert Falcon Scott (1868-1912),Scottn: [jmén.] anglický polárník Petr
Prášek |
atomic number 68
(wn) | atomic number 68
n 1: a trivalent metallic element of the rare earth group;
occurs with yttrium [syn: erbium, Er, {atomic number
68}] |
192.168.1.1
(foldoc) | 192.168.1.1
The default IP address used to connect to many
brands of router to set them up. It can be used from a {web
browser} in the URL (http://192.168.1.1). This URL, and
the necessary default login details, are often printed on the
router. The same address may also be accessible via a
telnet command line interface.
This is a private address that is only visible when
connected directly to the router, i.e. it will not be routed
by other network hardware.
i19216811.com (http://www.i19216811.com/).
(2012-09-20)
|
6800
(foldoc) | Motorola 6800
6800
A microprocessor released shortly after the
Intel 8080, in about 1975. It had 78 instructions,
including the undocumented HCF (Halt and Catch Fire) bus
test instruction. The 6800 evolved into the Motorola 6801
and 6803.
The 6502 was based on the design of the 6800 but had one
less data register and one more index register.
(1994-10-31)
|
68000
(foldoc) | Motorola 68000
68000
MC68000
(MC68000) The first member of Motorola, Inc.'s
family of 16- and 32-bit microprocessors. The successor to
the Motorola 6809 and followed by the Motorola 68010.
The 68000 has 32-bit registers but only a 16-bit ALU and
external data bus. It has 24-bit addressing and a {linear
address space}, with none of the evil segment registers of
Intel's contemporary processors that make programming them
unpleasant. That means that a single directly accessed
array or structure can be larger than 64KB in size.
Addresses are computed as 32 bit, but the top 8 bits are cut
to fit the address bus into a 64-pin package (address and data
share a bus in the 40 pin packages of the 8086 and {Zilog
Z8000}).
The 68000 has sixteen 32-bit registers, split into data and
address registers. One address register is reserved for the
Stack Pointer. Any register, of either type, can be used
for any function except direct addressing. Only address
registers can be used as the source of an address, but data
registers can provide the offset from an address.
Like the Zilog Z8000, the 68000 features a supervisor and
user mode, each with its own Stack Pointer. The {Zilog
Z8000} and 68000 are similar in capabilities, but the 68000 is
32 bits internally, making it faster and eliminating forced
segmentations.
Like many other CPUs of its generation, it can fetch the next
instruction during execution (2 stage pipeline).
The 68000 was used in many workstations, notably early
Sun-2 machines, and personal computers, notably {Apple
Computer}'s first Macintoshes and the Amiga. It was also
used in most of Sega's early arcade machines, and in the
Genesis/Megadrive consoles.
Variants of the 68000 include the 68HC000 (a low-power HCMOS
implementation) and the 68008 (an eight-bit data bus version
used in the Sinclair QL).
["The 68000: Principles and Programming", Leo Scanlon, 1981].
(2003-07-11)
|
68020
(foldoc) | Motorola 68020
68020
MC68020
A microprocessor from Motorola. It was the
successor to the Motorola 68010 and was followed by the
Motorola 68030. The 68020 has 32-bit internal and external
data and address buses and a 256-byte instruction buffer,
arranged as 64 direct-mapped 4-byte entries[?].
The 68020 added many improvements to the 68010 including a
32-bit ALU and external data bus and address bus, and
new instrucitons and addressing modes. The 68020 (and
68030) had a proper three-stage pipeline.
The new instructions included some minor improvements and
extensions to the supervisor state, some support for
high-level languages which didn't get used much (and was
removed from future 680x0 processors[?]), bigger (32 x 32-bit)
multiply and divide instructions, and bit field manipulations.
The new adderessing modes added another level of indirection
to many of the pre-existing modes, and added quite a bit of
flexibility to various indexing modes and operations.
The instruction buffer (an instruction cache) was 256
bytes, arranged as 64 direct-mapped 4-byte entries. Although
small, it made a significant difference in the performance of
many applications.
The 68881 and the faster 68882 FPU chips could be used with
the 68020.
The 68020 was used in many models of the Apple Macintosh II
series of personal computers and Sun 3 workstations.
(2001-03-07)
|
68030
(foldoc) | Motorola 68030
68030
MC68030
A 32-bit microprocessor in Motorola's
Motorola 68000 family, with on-chip split instruction and
data cache of 256 bytes each. The 68030 has an on-chip
MMU (except in the 680EC30 version).
The 68881 and the faster 68882 FPU chips could be used with
the 68030.
The 68030 was the successor to the Motorola 68020, and was
followed by the Motorola 68040.
The 68030 is used in many models of the Apple Macintosh II
series of personal computers.
(2001-01-08)
|
68040
(foldoc) | Motorola 68040
68040
MC68040
(MC68040) A microprocessor from Motorola. It
was the successor to the Motorola 68030 and was followed by
the Motorola 68060.
The 68040 was the first 680x0 family member with an on-chip
FPU. It also had split instruction and data caches of 4
kilobytes(?) each. It was fully pipelined, with six stages.
The 68040 was used in the Apple Macintosh Quadra series of
personal computers.
The MC68LC040 is an MC68040 without a built-in FPU, and the
MC68EC040 is an MC68040 without an MMU or FPU.
(2003-10-25)
|
68050
(foldoc) | Motorola 68050
68050
There was no 68050. The successor to the Motorola 68040 was
the Motorola 68060.
The even numbers (68000, 68020, 68060) were reserved for major
revisions to the 680x0 core. The odd numbers (68010, 68030,
68050) were minor upgrades from the previous chip. For
example, the Motorola 68010 was a Motorola 68000 with some
minor enhancements and modifications to some user/superuser
instruction assignments. The Motorola 68030 was a {Motorola
68020} with an MMU and more minor enhancements. The 68050
would have been a 68040 with some bugs fixed, which didn't
really warrant a new name so it was sold as a 68040.
(1995-11-29)
|
68060
(foldoc) | Motorola 68060
68060
A 32-bit microprocessor from Motorola, the
successor to the Motorola 68040. The 68060 is the highest
performance 680x0 family processor currently (April 1995)
available. It has 2 to 3 times the performance of the
68040.
The 68060 is probably the last development from Motorola in
the high performacnce 680x0 series. They don't want to
compete with their own PowerPC chips. The 680x0 series is
intended more for embedded systems, where it is already very
popular. New developments here seem to integrate more
peripheral functions on chip rather than increasing processing
power.
(1995-04-22)
|
6809
(foldoc) | Motorola 6809
6809
MC6809
(MC6809) An eight-bit microprocessor from {Motorola,
Inc.}.
The 6809 was a major advance over both its predecessor, the
Motorola 6800 and the 6502. The 6809 had two 8-bit
accumulators, rather than one in the 6502, and could combine
them into a single 16-bit register. It also featured two {index
registers} and two stack pointers, which allowed for some very
advanced addressing modes. The 6809 was source compatible
with the 6800, even though the 6800 had 78 instructions and the
6809 only had around 59 (including a SEX instruction). Some
instructions were replaced by more general ones which the
assembler would translate and some were replaced by {addressing
modes}.
The 6809 had one of the first multiplication instructions of the
time, 16-bit arithmetic and a special fast interrupt. But it
was also highly optimised, gaining up to five times the speed of
the 6800 series CPU. Like the 6800, it included the undocumented
HCF (Halt and Catch Fire) bus test instruction.
The Hitachi 6309 was a version with extra registers. The
6809 was used in the UK "Dragon 32" personal computer and
was followed by the Motorola 68000.
Usenet newsgroup: news:comp.sys.m6809.
Lennart Benschop posted a
emulator (originally called "usim") and a cross-assembler to
Usenet newsgroup alt.sources on 1993-11-03. Ray P. Bellis
released a version 0.11.
Benschop emulator (http://lennartb.home.xs4all.nl/m6809.html).
(2014-06-24)
|
680x0
(foldoc) | Motorola 680x0
680x0
Shorthand for any member for the Motorola 68000
family of microprocessors from Motorola, Inc. The "x"
stands for 0, 1, 2, 3, 4 or 6.
(1993-05-01)
|
686
(foldoc) | 686
Pentium Pro or possibly Cyrix 6x86.
(1997-05-26)
|
68hc11
(foldoc) | Motorola 68HC11
68HC11
A microcontroller family from Motorola
descended from the Motorola 6800 microprocessor.
The 68HC11 devices are more powerful and more expensive than
the 68HC05 family.
{FAQ
(ftp://src.doc.ic.ac.uk/usenet/usenet-by-group/comp.answers/microcontroller-faq/68hc11)}.
There is an opcode simulator for the 68HC11, by Ted Dunning
. Interrupts, hardware I/O, and half carries
are still outside the loop. Adding interrupts may require
simulating at the clock phase level. Version 1.
(ftp://crl.nmsu.edu/pub/non-lexical/6811/sim6811.shar).
(1995-04-28)
|
68lc040
(foldoc) | Motorola 68LC040
68LC040
A version of the Motorola 68040 with no MMU or
FPU, making it more like an enhanced Motorola 68020.
A Power Macintosh can emulate a Motorola 68LC040.
(1999-01-11)
|
algol 68
(foldoc) | ALGOL 68
An extensive revision of ALGOL 60 by Adriaan van
Wijngaarden et al. ALGOL 68 was discussed from 1963 by
Working Group 2.1 of IFIP. Its definition was accepted in
December 1968.
ALGOL 68 was the first, and still one of very few, programming
languages for which a complete formal specification was
created before its implementation. However, this
specification was hard to understand due to its formality, the
fact that it used an unfamiliar metasyntax notation (not
BNF) and its unconventional terminology.
One of the singular features of ALGOL 68 was its orthogonal
design, making for freedom from arbitrary rules (such as
restrictions in other languages that arrays could only be used
as parameters but not as results). It also allowed {user
defined data types}, then an unheard-of feature.
It featured structural equivalence; automatic type
conversion ("coercion") including dereferencing; {flexible
arrays}; generalised loops (for-from-by-to-while-do-od),
if-then-else-elif-fi, an integer case statement with an 'out'
clause (case-in-out-esac); skip and goto statements;
blocks; procedures; user-defined operators; {procedure
parameters}; concurrent execution (par-begin-end);
semaphores; generators "heap" and "loc" for {dynamic
allocation}. It had no abstract data types or {separate
compilation}.
(http://www.bookrags.com/research/algol-68-wcs/).
(2007-04-24)
|
algol 68 revised
(foldoc) | ALGOL 68 Revised
A significant simplification of ALGOL 68.
["Revised Report on the Algorithmic Language ALGOL 68," A. Van
Wijngaarden et al, Acta Informatica 5:1-236, 1975, also
Springer 1976, and SIGPLAN Notices 12(5):1-70, May 1977].
(1995-05-03)
|
algol 68-r
(foldoc) | ALGOL 68-R
A restriction of ALGOL 68 permitting {one-pass
compilation}, developed at the Royal Signals Radar
Establishment, Malvern, Worcester, UK in April 1970.
Identifiers, modes and operators must be declared before
use. There is no automatic proceduring and no
concurrency. It was implemented in ALGOL 60 under {GEORGE
3} on an ICL 1907F.
["ALGOL 68-R, Its Implementation and Use", I.F. Currie et al,
Proc IFIP Congress 1971, N-H 1971, pp. 360-363].
(1995-05-03)
|
algol 68c
(foldoc) | ALGOL 68C
A variant of ALGOL 68 developed by S. Bourne
and Mike Guy of Cambridge University in 1975 and used as
the implementation language for the CHAOS OS for the CAP
capability computer. ALGOL 68C was ported to the IBM 360,
VAX/VMS and several other platforms.
(1995-05-02)
|
algol 68rs
(foldoc) | ALGOL 68RS
An extension of ALGOL 68 supporting {function
closures} by the Royal Signals Radar Establishment, Malvern
UK. It has been ported to Multics and VAX/VMS.
(1995-05-04)
|
algol 68s
(foldoc) | ALGOL 68S
A subset of ALGOL 68 allowing simpler
compilation, intended mainly for numerical computation. It
was rewritten in BLISS for the PDP-11, and later in
Pascal. It is available as shareware from Charles Lindsey
.
Version 2.3 runs on Sun-3 under SunOS 4.x and Atari
under GEMDOS (or potentially other computers supported by
the Amsterdam Compiler Kit).
["A Sublanguage of ALGOL 68", P.G. Hibbard, SIGPLAN Notices
12(5), May 1977].
(1995-05-04)
|
c68
(foldoc) | c386
c68
A compiler for K&R C plus prototypes and other
ANSI C features by Matthew Brandt, Christoph van Wuellen,
Keith and Dave Walker. c386 is targetted to several 68000
and Intel 80386 assemblers, including gas.
floating-point support is by inline code or emulation.
It can produce lots of warnings and generates better code than
ACK.
{Version 4.2a
(ftp://bugs.nosc.mil/pub/Minix/common-pkgs/c386-4.2.tar.Z)}.
(2009-11-11)
|
dod-std-2168
(foldoc) | DoD-STD-2168
A DoD standard for software quality assurance
procedures.
(1996-05-29)
|
dream 6800
(foldoc) | DREAM 6800
A computer based on the Motorola 6800
microprocessor.
The DREAM 6800 could be programmed in CHIP-8.
(2002-04-09)
|
f68k
(foldoc) | F68K
A portable Forth system for Motorola 680x0 computers by
Joerg Plewe . Ported to
Atari ST, Atari TT, Amiga, Sinclair QL and OS9.
Easily ported to Motorola 68000 based systems.
(ftp://archive.umich.edu/atari/Languages/).
(1992-12-14)
|
itu-t x.680
(foldoc) | Coordinated Universal Time
CUT
ITU-T X.680
leap second
UTC
World Time
Zulu time
(UTC, World Time) The standard time common to
every place in the world. UTC is derived from {International
Atomic Time} (TAI) by the addition of a whole number of "leap
seconds" to synchronise it with Universal Time 1 (UT1), thus
allowing for the eccentricity of the Earth's orbit, the
rotational axis tilt (23.5 degrees), but still showing the
Earth's irregular rotation, on which UT1 is based.
Coordinated Universal Time is expressed using a 24-hour clock
and uses the Gregorian calendar. It is used in aeroplane
and ship navigation, where it also sometimes known by the
military name, "Zulu time". "Zulu" in the phonetic alphabet
stands for "Z" which stands for longitude zero.
UTC was defined by the International Radio Consultative
Committee (CCIR), a predecessor of the ITU-T. CCIR
Recommendation 460-4, or ITU-T Recommendation X.680 (7/94),
contains the full definition.
The language-independent international abbreviation, UTC, is
neither English nor French. It means both "Coordinated
Universal Time" and "Temps Universel Coordonné".
{BIPM
(http://www.bipm.org/enus/5_Scientific/c_time/time_1.html)}.
{The Royal Observatory Greenwich
(http://rog.nmm.ac.uk/leaflets/time/time.html)}.
{History of UTC and GMT
(http://ecco.bsee.swin.edu.au/chronos/GMT-explained.html)}.
{U.S. National Institute of Standards & Technology
(http://its.bldrdoc.gov/fs-1037/dir-009/_1277.htm)}.
{UK National Physical Laboratory
(http://npl.co.uk/npl/ctm/time_scales.html)}.
{US Naval Observatory
(http://tycho.usno.navy.mil/systime.html)}.
{International Telecommunications Union
(http://itu.int/radioclub/rr/arts02.htm)}.
Earth's irregular rotation (/pub/misc/earth_rotation).
(2001-08-30)
|
mc68000
(foldoc) | Motorola 68000
68000
MC68000
(MC68000) The first member of Motorola, Inc.'s
family of 16- and 32-bit microprocessors. The successor to
the Motorola 6809 and followed by the Motorola 68010.
The 68000 has 32-bit registers but only a 16-bit ALU and
external data bus. It has 24-bit addressing and a {linear
address space}, with none of the evil segment registers of
Intel's contemporary processors that make programming them
unpleasant. That means that a single directly accessed
array or structure can be larger than 64KB in size.
Addresses are computed as 32 bit, but the top 8 bits are cut
to fit the address bus into a 64-pin package (address and data
share a bus in the 40 pin packages of the 8086 and {Zilog
Z8000}).
The 68000 has sixteen 32-bit registers, split into data and
address registers. One address register is reserved for the
Stack Pointer. Any register, of either type, can be used
for any function except direct addressing. Only address
registers can be used as the source of an address, but data
registers can provide the offset from an address.
Like the Zilog Z8000, the 68000 features a supervisor and
user mode, each with its own Stack Pointer. The {Zilog
Z8000} and 68000 are similar in capabilities, but the 68000 is
32 bits internally, making it faster and eliminating forced
segmentations.
Like many other CPUs of its generation, it can fetch the next
instruction during execution (2 stage pipeline).
The 68000 was used in many workstations, notably early
Sun-2 machines, and personal computers, notably {Apple
Computer}'s first Macintoshes and the Amiga. It was also
used in most of Sega's early arcade machines, and in the
Genesis/Megadrive consoles.
Variants of the 68000 include the 68HC000 (a low-power HCMOS
implementation) and the 68008 (an eight-bit data bus version
used in the Sinclair QL).
["The 68000: Principles and Programming", Leo Scanlon, 1981].
(2003-07-11)
|
mc68010
(foldoc) | Motorola 68010
MC68010
A microprocessor from Motorola. It was the
successor to the Motorola 68000 and was followed by the
Motorola 68020. Some instructions which were previously
user mode were made system mode, which necessitated
patches to a few programs.
The 68010's main advantage over the 68000 was that it could
recover from a bus fault. The 68000 microcode didn't save
enough state to restart all instructions; the 68010 corrected
this fault. This allowed it to use paged virtual memory.
The 68010's DBxx (decrement and branch) instructions could
hold and execute the preceding instruction in the {prefetch
buffer}, allowing some two-instruction loops to execute
without refetching instructions.
At one time there was a 68010 variant that was pin-for-pin
compatible with the 68000. Early Amiga hackers replaced
their 68000s with 68010s in order to get a small performance
increase.
(1995-11-29)
|
mc68020
(foldoc) | Motorola 68020
68020
MC68020
A microprocessor from Motorola. It was the
successor to the Motorola 68010 and was followed by the
Motorola 68030. The 68020 has 32-bit internal and external
data and address buses and a 256-byte instruction buffer,
arranged as 64 direct-mapped 4-byte entries[?].
The 68020 added many improvements to the 68010 including a
32-bit ALU and external data bus and address bus, and
new instrucitons and addressing modes. The 68020 (and
68030) had a proper three-stage pipeline.
The new instructions included some minor improvements and
extensions to the supervisor state, some support for
high-level languages which didn't get used much (and was
removed from future 680x0 processors[?]), bigger (32 x 32-bit)
multiply and divide instructions, and bit field manipulations.
The new adderessing modes added another level of indirection
to many of the pre-existing modes, and added quite a bit of
flexibility to various indexing modes and operations.
The instruction buffer (an instruction cache) was 256
bytes, arranged as 64 direct-mapped 4-byte entries. Although
small, it made a significant difference in the performance of
many applications.
The 68881 and the faster 68882 FPU chips could be used with
the 68020.
The 68020 was used in many models of the Apple Macintosh II
series of personal computers and Sun 3 workstations.
(2001-03-07)
|
mc68030
(foldoc) | Motorola 68030
68030
MC68030
A 32-bit microprocessor in Motorola's
Motorola 68000 family, with on-chip split instruction and
data cache of 256 bytes each. The 68030 has an on-chip
MMU (except in the 680EC30 version).
The 68881 and the faster 68882 FPU chips could be used with
the 68030.
The 68030 was the successor to the Motorola 68020, and was
followed by the Motorola 68040.
The 68030 is used in many models of the Apple Macintosh II
series of personal computers.
(2001-01-08)
|
mc68040
(foldoc) | Motorola 68040
68040
MC68040
(MC68040) A microprocessor from Motorola. It
was the successor to the Motorola 68030 and was followed by
the Motorola 68060.
The 68040 was the first 680x0 family member with an on-chip
FPU. It also had split instruction and data caches of 4
kilobytes(?) each. It was fully pipelined, with six stages.
The 68040 was used in the Apple Macintosh Quadra series of
personal computers.
The MC68LC040 is an MC68040 without a built-in FPU, and the
MC68EC040 is an MC68040 without an MMU or FPU.
(2003-10-25)
|
mc6809
(foldoc) | Motorola 6809
6809
MC6809
(MC6809) An eight-bit microprocessor from {Motorola,
Inc.}.
The 6809 was a major advance over both its predecessor, the
Motorola 6800 and the 6502. The 6809 had two 8-bit
accumulators, rather than one in the 6502, and could combine
them into a single 16-bit register. It also featured two {index
registers} and two stack pointers, which allowed for some very
advanced addressing modes. The 6809 was source compatible
with the 6800, even though the 6800 had 78 instructions and the
6809 only had around 59 (including a SEX instruction). Some
instructions were replaced by more general ones which the
assembler would translate and some were replaced by {addressing
modes}.
The 6809 had one of the first multiplication instructions of the
time, 16-bit arithmetic and a special fast interrupt. But it
was also highly optimised, gaining up to five times the speed of
the 6800 series CPU. Like the 6800, it included the undocumented
HCF (Halt and Catch Fire) bus test instruction.
The Hitachi 6309 was a version with extra registers. The
6809 was used in the UK "Dragon 32" personal computer and
was followed by the Motorola 68000.
Usenet newsgroup: news:comp.sys.m6809.
Lennart Benschop posted a
emulator (originally called "usim") and a cross-assembler to
Usenet newsgroup alt.sources on 1993-11-03. Ray P. Bellis
released a version 0.11.
Benschop emulator (http://lennartb.home.xs4all.nl/m6809.html).
(2014-06-24)
|
motorola 6800
(foldoc) | Motorola 6800
6800
A microprocessor released shortly after the
Intel 8080, in about 1975. It had 78 instructions,
including the undocumented HCF (Halt and Catch Fire) bus
test instruction. The 6800 evolved into the Motorola 6801
and 6803.
The 6502 was based on the design of the 6800 but had one
less data register and one more index register.
(1994-10-31)
|
motorola 68000
(foldoc) | Motorola 68000
68000
MC68000
(MC68000) The first member of Motorola, Inc.'s
family of 16- and 32-bit microprocessors. The successor to
the Motorola 6809 and followed by the Motorola 68010.
The 68000 has 32-bit registers but only a 16-bit ALU and
external data bus. It has 24-bit addressing and a {linear
address space}, with none of the evil segment registers of
Intel's contemporary processors that make programming them
unpleasant. That means that a single directly accessed
array or structure can be larger than 64KB in size.
Addresses are computed as 32 bit, but the top 8 bits are cut
to fit the address bus into a 64-pin package (address and data
share a bus in the 40 pin packages of the 8086 and {Zilog
Z8000}).
The 68000 has sixteen 32-bit registers, split into data and
address registers. One address register is reserved for the
Stack Pointer. Any register, of either type, can be used
for any function except direct addressing. Only address
registers can be used as the source of an address, but data
registers can provide the offset from an address.
Like the Zilog Z8000, the 68000 features a supervisor and
user mode, each with its own Stack Pointer. The {Zilog
Z8000} and 68000 are similar in capabilities, but the 68000 is
32 bits internally, making it faster and eliminating forced
segmentations.
Like many other CPUs of its generation, it can fetch the next
instruction during execution (2 stage pipeline).
The 68000 was used in many workstations, notably early
Sun-2 machines, and personal computers, notably {Apple
Computer}'s first Macintoshes and the Amiga. It was also
used in most of Sega's early arcade machines, and in the
Genesis/Megadrive consoles.
Variants of the 68000 include the 68HC000 (a low-power HCMOS
implementation) and the 68008 (an eight-bit data bus version
used in the Sinclair QL).
["The 68000: Principles and Programming", Leo Scanlon, 1981].
(2003-07-11)
|
motorola 6801
(foldoc) | Motorola 6801
(And 6803) A version of the Motorola 6800 with
ROM, some RAM, a serial I/O port and other functions on
the chip. It was meant for embedded controllers, where the
part count was to be minimised. The 6803 led to the 68HC11
and that was extended to 16 bits as the 68HC16.
(1994-11-07)
|
motorola 68010
(foldoc) | Motorola 68010
MC68010
A microprocessor from Motorola. It was the
successor to the Motorola 68000 and was followed by the
Motorola 68020. Some instructions which were previously
user mode were made system mode, which necessitated
patches to a few programs.
The 68010's main advantage over the 68000 was that it could
recover from a bus fault. The 68000 microcode didn't save
enough state to restart all instructions; the 68010 corrected
this fault. This allowed it to use paged virtual memory.
The 68010's DBxx (decrement and branch) instructions could
hold and execute the preceding instruction in the {prefetch
buffer}, allowing some two-instruction loops to execute
without refetching instructions.
At one time there was a 68010 variant that was pin-for-pin
compatible with the 68000. Early Amiga hackers replaced
their 68000s with 68010s in order to get a small performance
increase.
(1995-11-29)
|
motorola 68020
(foldoc) | Motorola 68020
68020
MC68020
A microprocessor from Motorola. It was the
successor to the Motorola 68010 and was followed by the
Motorola 68030. The 68020 has 32-bit internal and external
data and address buses and a 256-byte instruction buffer,
arranged as 64 direct-mapped 4-byte entries[?].
The 68020 added many improvements to the 68010 including a
32-bit ALU and external data bus and address bus, and
new instrucitons and addressing modes. The 68020 (and
68030) had a proper three-stage pipeline.
The new instructions included some minor improvements and
extensions to the supervisor state, some support for
high-level languages which didn't get used much (and was
removed from future 680x0 processors[?]), bigger (32 x 32-bit)
multiply and divide instructions, and bit field manipulations.
The new adderessing modes added another level of indirection
to many of the pre-existing modes, and added quite a bit of
flexibility to various indexing modes and operations.
The instruction buffer (an instruction cache) was 256
bytes, arranged as 64 direct-mapped 4-byte entries. Although
small, it made a significant difference in the performance of
many applications.
The 68881 and the faster 68882 FPU chips could be used with
the 68020.
The 68020 was used in many models of the Apple Macintosh II
series of personal computers and Sun 3 workstations.
(2001-03-07)
|
motorola 68030
(foldoc) | Motorola 68030
68030
MC68030
A 32-bit microprocessor in Motorola's
Motorola 68000 family, with on-chip split instruction and
data cache of 256 bytes each. The 68030 has an on-chip
MMU (except in the 680EC30 version).
The 68881 and the faster 68882 FPU chips could be used with
the 68030.
The 68030 was the successor to the Motorola 68020, and was
followed by the Motorola 68040.
The 68030 is used in many models of the Apple Macintosh II
series of personal computers.
(2001-01-08)
|
motorola 68040
(foldoc) | Motorola 68040
68040
MC68040
(MC68040) A microprocessor from Motorola. It
was the successor to the Motorola 68030 and was followed by
the Motorola 68060.
The 68040 was the first 680x0 family member with an on-chip
FPU. It also had split instruction and data caches of 4
kilobytes(?) each. It was fully pipelined, with six stages.
The 68040 was used in the Apple Macintosh Quadra series of
personal computers.
The MC68LC040 is an MC68040 without a built-in FPU, and the
MC68EC040 is an MC68040 without an MMU or FPU.
(2003-10-25)
|
motorola 68050
(foldoc) | Motorola 68050
68050
There was no 68050. The successor to the Motorola 68040 was
the Motorola 68060.
The even numbers (68000, 68020, 68060) were reserved for major
revisions to the 680x0 core. The odd numbers (68010, 68030,
68050) were minor upgrades from the previous chip. For
example, the Motorola 68010 was a Motorola 68000 with some
minor enhancements and modifications to some user/superuser
instruction assignments. The Motorola 68030 was a {Motorola
68020} with an MMU and more minor enhancements. The 68050
would have been a 68040 with some bugs fixed, which didn't
really warrant a new name so it was sold as a 68040.
(1995-11-29)
|
motorola 68060
(foldoc) | Motorola 68060
68060
A 32-bit microprocessor from Motorola, the
successor to the Motorola 68040. The 68060 is the highest
performance 680x0 family processor currently (April 1995)
available. It has 2 to 3 times the performance of the
68040.
The 68060 is probably the last development from Motorola in
the high performacnce 680x0 series. They don't want to
compete with their own PowerPC chips. The 680x0 series is
intended more for embedded systems, where it is already very
popular. New developments here seem to integrate more
peripheral functions on chip rather than increasing processing
power.
(1995-04-22)
|
motorola 6809
(foldoc) | Motorola 6809
6809
MC6809
(MC6809) An eight-bit microprocessor from {Motorola,
Inc.}.
The 6809 was a major advance over both its predecessor, the
Motorola 6800 and the 6502. The 6809 had two 8-bit
accumulators, rather than one in the 6502, and could combine
them into a single 16-bit register. It also featured two {index
registers} and two stack pointers, which allowed for some very
advanced addressing modes. The 6809 was source compatible
with the 6800, even though the 6800 had 78 instructions and the
6809 only had around 59 (including a SEX instruction). Some
instructions were replaced by more general ones which the
assembler would translate and some were replaced by {addressing
modes}.
The 6809 had one of the first multiplication instructions of the
time, 16-bit arithmetic and a special fast interrupt. But it
was also highly optimised, gaining up to five times the speed of
the 6800 series CPU. Like the 6800, it included the undocumented
HCF (Halt and Catch Fire) bus test instruction.
The Hitachi 6309 was a version with extra registers. The
6809 was used in the UK "Dragon 32" personal computer and
was followed by the Motorola 68000.
Usenet newsgroup: news:comp.sys.m6809.
Lennart Benschop posted a
emulator (originally called "usim") and a cross-assembler to
Usenet newsgroup alt.sources on 1993-11-03. Ray P. Bellis
released a version 0.11.
Benschop emulator (http://lennartb.home.xs4all.nl/m6809.html).
(2014-06-24)
|
motorola 680x0
(foldoc) | Motorola 680x0
680x0
Shorthand for any member for the Motorola 68000
family of microprocessors from Motorola, Inc. The "x"
stands for 0, 1, 2, 3, 4 or 6.
(1993-05-01)
|
motorola 68hc11
(foldoc) | Motorola 68HC11
68HC11
A microcontroller family from Motorola
descended from the Motorola 6800 microprocessor.
The 68HC11 devices are more powerful and more expensive than
the 68HC05 family.
{FAQ
(ftp://src.doc.ic.ac.uk/usenet/usenet-by-group/comp.answers/microcontroller-faq/68hc11)}.
There is an opcode simulator for the 68HC11, by Ted Dunning
. Interrupts, hardware I/O, and half carries
are still outside the loop. Adding interrupts may require
simulating at the clock phase level. Version 1.
(ftp://crl.nmsu.edu/pub/non-lexical/6811/sim6811.shar).
(1995-04-28)
|
motorola 68lc040
(foldoc) | Motorola 68LC040
68LC040
A version of the Motorola 68040 with no MMU or
FPU, making it more like an enhanced Motorola 68020.
A Power Macintosh can emulate a Motorola 68LC040.
(1999-01-11)
|
multipop-68
(foldoc) | Multipop-68
An early time-sharing operating system
developed in Edinburgh by Robin Popplestone and others. It
was inspired by MIT' Project MAC, via a "MiniMac" project
which was aborted when it became obvious that {Elliot
Brothers} Ltd. could not supply the necessary disk storage.
Multipop was highly efficient in its use of machine resources
to support symbolic programming, and effective - e.g. in
supporting the development of the Boyer-Moore theorem prover
and of Burstall and Darlington's transformation work.
It was not good at supporting the user programs which were
then the standard fare of computing, e.g. matrix inversion.
This arose from the fact that while the POP-2 compiler
generated good code for function call (which is a lot of what
layered systems like operating systems do) it did not generate
efficient code for arithmetic or store access, because there
was no way to police the generation of illegal objects
statically. (Hindley-Milner type checking did not exist).
Indeed, since many OS features like file-access were performed
by function-call (of a closure) rather than an OS call
requiring a context switch, POP-2 actually gained
performance.
Multipop68 was efficient primarily because the one language,
POP-2 served all purposes: it was the command language for the
operating system as well as being the only available
programming language. Thus there was no need to swap in
compilers etc. All store management was accomplished
uniformly by the garbage collector, as opposed to having
store management for the OS and store management for each
application.
There was a substantial amount of assembly language in
Multipop68. This was primarily for interrupt handling, and it
is difficult to handle this without a real-time
garbage-collector.
[Edited from a posting by Robin Popplestone].
(1995-03-15)
|
philips scc68070
(foldoc) | Philips SCC68070
A microprocessor which is object code
compatible with the Motorola 68000. It is not a performance
improvement over the 68060; it's performance rather resembles
that of the 68000.
(1995-04-22)
|
rfc 1268
(foldoc) | RFC 1268
One of the RFCs describing {Border
Gateway Protocol}.
(rfc:1268).
|
rfc 1568
(foldoc) | RFC 1568
An RFC defining the {Simple Network
Paging Protocol} (SNPP) which is designed to support
Internet access to paging services such as those based on
the Telocator Alphanumeric Protocol. See also RFC 1861.
(rfc:1568).
(1996-06-24)
|
rfc 2068
(foldoc) | RFC 2068
The RFC defining HTTP version 1.1.
(rfc:2068).
(1997-05-03)
|
x.680
(foldoc) | X.680
[Is it Coordinated Universal Time or {Abstract Syntax
Notation 1}?]
(1999-12-09)
|
oc768
(vera) | OC768
Optical Carrier level 768 [39813,12 Mbps] (SONET, STM-256),
"OC-768"
|
|